Post Annealing Effects on the Electrical Characteristics of Pentacene Thin Film Transistors on Flexible Substrates

Abstract

This work studies the effect of post annealing of pentacene on a flexible substrate through the examination of electrical properties and surface morphologies. It is confirmed that the best performance of devices is achieved when the post annealing temperature is 60 degrees C, since the grain size increases, which decrease grain boundaries caused Charge transport limit. We can also confirmed the large threshold voltage shift of device annealed at 60 degrees C that means the lower trap density between channel and insulator interface. The device annealed at 60 degrees C exhibits a saturation mobility of 1.99 cm(2)/V.s, an on/off ratio of 1.87 x 10(4), and a subthreshold slope of 2.5 V/decade.