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New Bit Parallel Multiplier With Low Space Complexity for All Irreducible Trinomials Over GF(2(n))

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dc.contributor.authorCho, Young In-
dc.contributor.authorChang, Nam Su-
dc.contributor.authorKim, Chang Han-
dc.contributor.authorPark, Young-Ho-
dc.contributor.authorHong, Seokhie-
dc.date.accessioned2021-09-06T15:01:48Z-
dc.date.available2021-09-06T15:01:48Z-
dc.date.created2021-06-15-
dc.date.issued2012-10-
dc.identifier.issn1063-8210-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/107346-
dc.description.abstractKoc and Sunar proposed an architecture of the Mastrovito multiplier for the irreducible trinomial f(x) = x(n) + x(k) + 1, where k not equal n/2 to reduce the time complexity. Also, many multipliers based on the Karatsuba-Ofman algorithm (KOA) was proposed that sacrificed time efficiency for low space complexity. In this paper, a new multiplication formula which is a variant of KOA presented. We also provide a straightforward architecture of a non-pipelined bit-parallel multiplier using the new formula. The proposed multiplier has lower space complexity than and comparable time complexity to previous Mastrovito multipliers' for all irreducible trinomials.-
dc.languageEnglish-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectFINITE-FIELD MULTIPLIERS-
dc.subjectMASTROVITO MULTIPLIER-
dc.subjectPOLYNOMIAL BASIS-
dc.subjectGF(2(M))-
dc.subjectARCHITECTURE-
dc.subjectDESIGN-
dc.titleNew Bit Parallel Multiplier With Low Space Complexity for All Irreducible Trinomials Over GF(2(n))-
dc.typeArticle-
dc.contributor.affiliatedAuthorHong, Seokhie-
dc.identifier.doi10.1109/TVLSI.2011.2162594-
dc.identifier.scopusid2-s2.0-84864777872-
dc.identifier.wosid000306922400018-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.20, no.10, pp.1903 - 1908-
dc.relation.isPartOfIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS-
dc.citation.titleIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS-
dc.citation.volume20-
dc.citation.number10-
dc.citation.startPage1903-
dc.citation.endPage1908-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Hardware & Architecture-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusFINITE-FIELD MULTIPLIERS-
dc.subject.keywordPlusMASTROVITO MULTIPLIER-
dc.subject.keywordPlusPOLYNOMIAL BASIS-
dc.subject.keywordPlusGF(2(M))-
dc.subject.keywordPlusARCHITECTURE-
dc.subject.keywordPlusDESIGN-
dc.subject.keywordAuthorBit-parallel multiplier-
dc.subject.keywordAuthorfinite field-
dc.subject.keywordAuthorirreducible trinomial-
dc.subject.keywordAuthorMastrovito multiplication-
dc.subject.keywordAuthorpolynomial basis-
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