HANDLING EDGE LISTS IN 2D VECTOR GRAPHICS HARDWARE
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Seo, Sang-Woo | - |
dc.contributor.author | Shen, Yong-Luo | - |
dc.contributor.author | Kim, Kwan-Young | - |
dc.contributor.author | Oh, Hyeong-Cheol | - |
dc.date.accessioned | 2021-09-06T20:30:59Z | - |
dc.date.available | 2021-09-06T20:30:59Z | - |
dc.date.created | 2021-06-18 | - |
dc.date.issued | 2012-05 | - |
dc.identifier.issn | 0218-1266 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/108592 | - |
dc.description.abstract | In rendering two-dimensional (2D) vector graphics, edge lists are often so large that their handling hinders the desired operation of portable devices. This paper proposes and evaluates an efficient edge-list handling method for a 2D vector graphics hardware accelerator. The proposed method selects edges that span the next scanline from among those spanning the current scanline and stores them in a small list in the internal memory. An edge list is assigned to each scanline and it stores only those edges that have not appeared in previous edge lists. Given that most active edges span only a few scanlines, the internal list can be small and implemented in the accelerator, whereas the edge lists are held in the external memory. Experimental results show that the proposed method can reduce external memory access by 23.4% - 76.6% for the benchmark images considered compared to the prior methods. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | WORLD SCIENTIFIC PUBL CO PTE LTD | - |
dc.title | HANDLING EDGE LISTS IN 2D VECTOR GRAPHICS HARDWARE | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Oh, Hyeong-Cheol | - |
dc.identifier.doi | 10.1142/S0218126612500223 | - |
dc.identifier.scopusid | 2-s2.0-84863521939 | - |
dc.identifier.wosid | 000306071900008 | - |
dc.identifier.bibliographicCitation | JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.21, no.3 | - |
dc.relation.isPartOf | JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS | - |
dc.citation.title | JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS | - |
dc.citation.volume | 21 | - |
dc.citation.number | 3 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordAuthor | Vector graphics | - |
dc.subject.keywordAuthor | accelerator | - |
dc.subject.keywordAuthor | edge lists | - |
dc.subject.keywordAuthor | active edge lists | - |
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