Charge-redistribution DAC with double bit processing in single capacitor

Abstract

An 8-bit charge-redistribution DAC with double bit processing in a single capacitor is proposed. The proposed DAC requires only four binary weighted capacitors where each capacitor converts 2-bit digital data into an analogue value in a single conversion step. Therefore, capacitor area can be effectively reduced without affecting the conversion time. The proposed 8-bit DAC is fabricated using CMOS 0.18 mu m technology with a core area of 0.0934 mm(2).