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Peak Channel Temperature of Graphene-Based Transistors

Authors
Ko, GeunwooJung, YounghunKim, Jihyun
Issue Date
8월-2010
Publisher
AMER SCIENTIFIC PUBLISHERS
Keywords
Graphene; Channel Temperature; Transistor
Citation
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.10, no.8, pp.4889 - 4892
Indexed
SCIE
SCOPUS
Journal Title
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY
Volume
10
Number
8
Start Page
4889
End Page
4892
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/115953
DOI
10.1166/jnn.2010.2414
ISSN
1533-4880
Abstract
In this study, graphene was mechanically deposited on SiO2/Si substrate, followed by ohmic metallization using electron-beam lithography. Finite element analysis was employed to characterize the operating temperature of graphene-based devices using the experimentally determined current voltage data. The temperature of the hottest spot where the underlying SiO2 layer was 300 nm thick was elevated up to about 70 degrees C at a 10 mW dissipated power. However, the operating temperature dropped to about 50 degrees C when the 300 nm thick SiO2 layer was replaced with a 20 nm thick SiO2 layer. Thermal management is very critical in the reliability of graphene-based high speed electronic devices because the high operating temperature can degrade the device performance.
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