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FPGA identification and reverse engineering with analysis of bitstream structures

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dc.contributor.authorLee, Hyung-Min-
dc.date.accessioned2021-08-27T16:04:58Z-
dc.date.available2021-08-27T16:04:58Z-
dc.date.created2021-04-22-
dc.date.issued2019-06-27-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/11597-
dc.publisher대한전자공학회-
dc.titleFPGA identification and reverse engineering with analysis of bitstream structures-
dc.title.alternativeFPGA identification and reverse engineering with analysis of bitstream structures-
dc.typeConference-
dc.contributor.affiliatedAuthorLee, Hyung-Min-
dc.identifier.bibliographicCitation대한전자공학회 하계학술대회-
dc.relation.isPartOf대한전자공학회 하계학술대회-
dc.relation.isPartOf대한전자공학회 하계학술대회-
dc.citation.title대한전자공학회 하계학술대회-
dc.citation.conferencePlaceKO-
dc.citation.conferencePlace제주도-
dc.citation.conferenceDate2019-06-26-
dc.type.rimsCONF-
dc.description.journalClass2-
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공과대학 (전기전자공학부)
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