Solid-State Disk with Double Data Rate DRAM Interface for High-Performance PCs
DC Field | Value | Language |
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dc.contributor.author | Kim, Dong | - |
dc.contributor.author | Bang, Kwanhu | - |
dc.contributor.author | Ha, Seung-Hwan | - |
dc.contributor.author | Park, Chanik | - |
dc.contributor.author | Chung, Sung Woo | - |
dc.contributor.author | Chung, Eui-Young | - |
dc.date.accessioned | 2021-09-08T18:20:31Z | - |
dc.date.available | 2021-09-08T18:20:31Z | - |
dc.date.created | 2021-06-10 | - |
dc.date.issued | 2009-04 | - |
dc.identifier.issn | 1745-1361 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/120294 | - |
dc.description.abstract | We propose a Solid-State Disk (SSD) with a Double Data Rate (DDR) DRAM interface for high-performance PCs. Traditional SSDs simply inherit the interface protocol of Hard Disk Drives (HDD) such as Parallel Advanced Technology Attachment (PATA) or Serial-ATA (SATA) for maintaining the compatibility. However, SSD itself provides much higher performance than HDD, hence the interface also needs to be enhanced. Unlike the traditional SSDs, the proposed SSD with DDR DRAM interface is placed in the North Bridge which provides two or more DDR DRAM interface ports in high-performance PCs. The novelty of our work is on DQS signaling scheme which allows arbitrary Column Address Strobe (CAS) latency unlike typical DDR DRAM interface scheme. The experimental results show that the proposed SSD maximally outperforms the traditional SSD by 8.7 times in read mode, by 1.5 times in write mode. Also, for synthetic workloads, the proposed scheme shows performance improvement over the conventional architecture by a factor of 1.6 times. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG | - |
dc.title | Solid-State Disk with Double Data Rate DRAM Interface for High-Performance PCs | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Chung, Sung Woo | - |
dc.identifier.doi | 10.1587/transinf.E92.D.727 | - |
dc.identifier.scopusid | 2-s2.0-77950360835 | - |
dc.identifier.wosid | 000265703000017 | - |
dc.identifier.bibliographicCitation | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E92D, no.4, pp.727 - 731 | - |
dc.relation.isPartOf | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS | - |
dc.citation.title | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS | - |
dc.citation.volume | E92D | - |
dc.citation.number | 4 | - |
dc.citation.startPage | 727 | - |
dc.citation.endPage | 731 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Software Engineering | - |
dc.subject.keywordAuthor | SSD (Solid-State Disk) | - |
dc.subject.keywordAuthor | NAND flash | - |
dc.subject.keywordAuthor | North Bridge | - |
dc.subject.keywordAuthor | DRAM interface | - |
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