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A Low-Power Programmable DLL-Based Clock Generator With Wide-Range Antiharmonic Lock

Authors
Koo, JabeomOk, SunghwaKim, Chulwoo
Issue Date
1월-2009
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Antiharmonic lock; frequency multiplier
Citation
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.56, no.1, pp.21 - 25
Indexed
SCIE
SCOPUS
Journal Title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume
56
Number
1
Start Page
21
End Page
25
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/120791
DOI
10.1109/TCSII.2008.2008531
ISSN
1549-7747
Abstract
A delay-locked-loop (DLL)-based clock generator for dynamic frequency scaling has been developed in a 0.13-mu m CMOS technology. The proposed clock generator can generate a wide range of the multiplied clock signals ranging from 125 MHz to 2 GHz. In addition, owing to the proposed antiharmonic-lock block, the clock generator can change the frequency dynamically in one cycle time of the reference clock. The proposed DLL-based clock generator occupies 0.019 mm(2) and consumes 21 mW at 2 GHz. The ratio of power consumption to frequency of the proposed clock generator is smaller than those of conventional ones.
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