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고전압 전력소자를 보호하기 위한 Sense FET 설계방법

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dc.contributor.author경신수-
dc.contributor.author서준호-
dc.contributor.author김요한-
dc.contributor.author강이구-
dc.contributor.author성만영-
dc.contributor.author이종석-
dc.date.accessioned2021-09-08T23:19:11Z-
dc.date.available2021-09-08T23:19:11Z-
dc.date.created2021-06-17-
dc.date.issued2009-
dc.identifier.issn1226-7945-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/121542-
dc.description.abstractCurrent sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper, we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450 V power MOSFET by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration 1.5×1014 cm-3, size of 600 ㎛2 with 4.5 Ω, and off-state leakage current below 50 μA. We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods are meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.-
dc.languageKorean-
dc.language.isoko-
dc.publisher한국전기전자재료학회-
dc.title고전압 전력소자를 보호하기 위한 Sense FET 설계방법-
dc.title.alternativeA Design Method on Power Sense FET to Protect High Voltage Power Device-
dc.typeArticle-
dc.contributor.affiliatedAuthor성만영-
dc.identifier.bibliographicCitation전기전자재료학회논문지, v.22, no.1, pp.12 - 16-
dc.relation.isPartOf전기전자재료학회논문지-
dc.citation.title전기전자재료학회논문지-
dc.citation.volume22-
dc.citation.number1-
dc.citation.startPage12-
dc.citation.endPage16-
dc.type.rimsART-
dc.identifier.kciidART001308356-
dc.description.journalClass2-
dc.description.journalRegisteredClasskci-
dc.subject.keywordAuthorSense FET-
dc.subject.keywordAuthorCurrent sensing-
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