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A 32-Gb/s Dual-Mode Transceiver With One-Tap FIR and Two-Tap IIR RX Only Equalization in 65-nm CMOS Technology

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dc.contributor.authorSong, Junyoung-
dc.contributor.authorHwang, Sewook-
dc.contributor.authorKim, Chulwoo-
dc.date.accessioned2022-02-26T22:41:26Z-
dc.date.available2022-02-26T22:41:26Z-
dc.date.created2022-01-20-
dc.date.issued2021-08-
dc.identifier.issn1063-8210-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/137066-
dc.description.abstractThis article presents an receiver (RX) only equalization (ROE) technique that eliminates feed-forward equalization (FFE) in transmitter (TX) and bandwidth improved output driver without increment of power consumption. With a help of the proposed design technique, the power consumption, circuit complexity, and design cost are improved. The proposed RX with one-tap finite-impulse response (FIR) and second-tap IIR decision feedback equalizer (DFE) removes the FFE equalization in TX by moving the sampling point of main cursor in the received data. A simpler TX architecture with nMOS only output driver (NOD) owing to the ROE facilitates a wide bandwidth and energy efficient dual-mode ( differential and single-ended) operation. The proposed transceiver was fabricated in a 65-nm CMOS technology. The RX achieves bit error rate (BER) less than 10(-12) over a 22-dB channel loss at 32 Gb/s with 0.62-pJ/bit energy efficiency, and the TX with NOD has 0.77- and 0.40-pJ/bit energy efficiency at 32 Gb/s in differential mode and single-ended mode, respectively. The occupied area of TX and RX is 0.002 and 0.024 mm(2), respectively.-
dc.languageEnglish-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectDFE-
dc.subjectRECEIVER-
dc.titleA 32-Gb/s Dual-Mode Transceiver With One-Tap FIR and Two-Tap IIR RX Only Equalization in 65-nm CMOS Technology-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, Chulwoo-
dc.identifier.doi10.1109/TVLSI.2021.3086325-
dc.identifier.scopusid2-s2.0-85111983411-
dc.identifier.wosid000679530800009-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.29, no.8, pp.1567 - 1574-
dc.relation.isPartOfIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS-
dc.citation.titleIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS-
dc.citation.volume29-
dc.citation.number8-
dc.citation.startPage1567-
dc.citation.endPage1574-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Hardware & Architecture-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusDFE-
dc.subject.keywordPlusRECEIVER-
dc.subject.keywordAuthorDecision feedback equalizer (DFE)-
dc.subject.keywordAuthordual-mode operation-
dc.subject.keywordAuthorequalization-
dc.subject.keywordAuthortransceiver-
dc.subject.keywordAuthorwireline interface-
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