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A 56-Gb/s PAM-4 Receiver Using Time-Based LSB Decoder and S/H Technique for Robustness to Comparator Voltage Variations

Authors
Park, HyunsuSim, JincheolChoi, YoonjaeChoi, JonghyuckKwon, YoungwookKim, Chulwoo
Issue Date
2월-2022
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Decoding; Receivers; Time-domain analysis; Nonlinear distortion; Clocks; Bit error rate; Threshold voltage; Adaptive threshold voltage calibration; Ethernet applications; high-speed interface; pulse amplitude modulation-4 (PAM-4); time-based receiver
Citation
IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.2, pp.562 - 572
Indexed
SCIE
SCOPUS
Journal Title
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume
57
Number
2
Start Page
562
End Page
572
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/137516
DOI
10.1109/JSSC.2021.3098821
ISSN
0018-9200
Abstract
This article presents a 0.975-pJ/bit 56-Gb/s pulse amplitude modulation-4 (PAM-4) receiver using a time-based least significant bit (LSB) decoder in 28-nm CMOS technology. The proposed time-domain decision technique improves the robustness of comparator voltage variations by separating the data and reference paths. If the reference voltage difference is constant regardless of the common-mode voltage shift, the time-domain decoder achieves a low bit error rate (BER). To improve the timing margin of the LSB decoder from the data-dependent jitter, a sample-and-hold (S/H) structure is adopted in both the data and reference paths. The S/H circuits extend the timing margin by converting the input of the comparators to a constant voltage. The number of comparators for data decoding is reduced to two-thirds, and only eight comparators are required for a quarter-rate structure. The number of comparators in the data path, excluding the reference path, is 4, which reduces the loading capacitance. An adaptive threshold voltage calibration was implemented to generate the timing reference pulse. In addition to bathtub graphs, the BER, according to the $ {V_{CM}}$ change of the reference voltages, is plotted to show the sensitivity to the voltage variation.
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