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Mixup-based classification of mixed-type defect patterns in wafer bin maps

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dc.contributor.authorShin, Wooksoo-
dc.contributor.authorKahng, Hyungu-
dc.contributor.authorKim, Seoung Bum-
dc.date.accessioned2022-06-09T15:41:03Z-
dc.date.available2022-06-09T15:41:03Z-
dc.date.created2022-06-09-
dc.date.issued2022-05-
dc.identifier.issn0360-8352-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/141749-
dc.description.abstractWafer bin maps (WBMs) that exhibit systematic defect patterns provide clues for identification of critical failures that occur during the wafer fabrication process. Proper identification of WBMs with specific defect patterns is tied closely to yield improvement in semiconductor manufacturing. Although the latest trend in training neural networks for single defect patterns has made significant progress, identification of WBMs with mixed-type defect patterns has received little attention possibly because of insufficient labeled data with multiple defects which are necessary for model training. To this end, we propose a method to use WBM data with only a single defect for training convolutional neural networks (CNNs) to classify mixed-type defects. Unlike previous methods that focus on synthesizing mixed-type defects prior to model training, our proposed method generates mixed-type defect patterns on the fly for model training by adopting Mixup, a popular neural network regularization strategy. Our method improves performance on WBM classification tasks with two defect types by 19.4 %p and three defect types by 22.1 %p, compared to previous baselines. Experiments were conducted on a real-world WBM benchmark, WM-811 k, to demonstrate the effectiveness and applicability of the proposed method.-
dc.languageEnglish-
dc.language.isoen-
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD-
dc.subjectINSPECTION-
dc.titleMixup-based classification of mixed-type defect patterns in wafer bin maps-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, Seoung Bum-
dc.identifier.doi10.1016/j.cie.2022.107996-
dc.identifier.scopusid2-s2.0-85124221841-
dc.identifier.wosid000772079700008-
dc.identifier.bibliographicCitationCOMPUTERS & INDUSTRIAL ENGINEERING, v.167-
dc.relation.isPartOfCOMPUTERS & INDUSTRIAL ENGINEERING-
dc.citation.titleCOMPUTERS & INDUSTRIAL ENGINEERING-
dc.citation.volume167-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Interdisciplinary Applications-
dc.relation.journalWebOfScienceCategoryEngineering, Industrial-
dc.subject.keywordPlusINSPECTION-
dc.subject.keywordAuthorWafer bin maps-
dc.subject.keywordAuthorMixed-type defect patterns-
dc.subject.keywordAuthorConvolutional neural networks-
dc.subject.keywordAuthorMixup-
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