Interface engineering of 9X stacked 3D NAND flash memory using hydrogen post-treatment annealing
DC Field | Value | Language |
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dc.contributor.author | Choi, Saeyan | - |
dc.contributor.author | Kim, Seungsob | - |
dc.contributor.author | Bang, Seain | - |
dc.contributor.author | Kim, Jungchun | - |
dc.contributor.author | Park, Dong Geun | - |
dc.contributor.author | Jin, Seunghee | - |
dc.contributor.author | Kim, Min Jung | - |
dc.contributor.author | Kwon, Eunmee | - |
dc.contributor.author | Lee, Jae Woo | - |
dc.date.accessioned | 2022-12-08T07:42:16Z | - |
dc.date.available | 2022-12-08T07:42:16Z | - |
dc.date.created | 2022-12-08 | - |
dc.date.issued | 2023-01-08 | - |
dc.identifier.issn | 0957-4484 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/146454 | - |
dc.description.abstract | This study investigates the effects of hydrogen post-treatment on 3D NAND flash memory. Hydrogen post-treatment annealing (PTA) is suggested to passivate the defects in the tunneling oxide/poly-Si interface and inside the poly-Si channel. However, excess hydrogen PTA can release hydrogen atoms from the passivated defects, which may degrade device performance. Therefore, it is important to determine the appropriate PTA condition for optimization of the device performance. Three different conditions for hydrogen PTA, namely Reference, H, and H++, are applied to observe the effects on device performance. The activation energy (E-a) of the device parameters was extracted according to the hydrogen PTA condition to analyze the effects. The extracted E-a is about 74 meV for Reference, 53 meV for H, and 58 meV for H++ conditions, with the best performance observed at the H condition. Optimal hydrogen PTA shows the best on-current (51% higher than Reference) and stable short-term retention (66% suppressed Delta V-T than Reference) in 9X stacked 3D NAND flash memory. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | IOP Publishing Ltd | - |
dc.subject | TRANSCONDUCTANCE DEGRADATION | - |
dc.subject | THRESHOLD VOLTAGE | - |
dc.subject | POLYSILICON | - |
dc.subject | OXIDE | - |
dc.subject | PASSIVATION | - |
dc.subject | TRANSISTORS | - |
dc.title | Interface engineering of 9X stacked 3D NAND flash memory using hydrogen post-treatment annealing | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Lee, Jae Woo | - |
dc.identifier.doi | 10.1088/1361-6528/ac97a1 | - |
dc.identifier.scopusid | 2-s2.0-85141004709 | - |
dc.identifier.wosid | 000877314500001 | - |
dc.identifier.bibliographicCitation | NANOTECHNOLOGY, v.34, no.2 | - |
dc.relation.isPartOf | NANOTECHNOLOGY | - |
dc.citation.title | NANOTECHNOLOGY | - |
dc.citation.volume | 34 | - |
dc.citation.number | 2 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Nanoscience & Nanotechnology | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | TRANSCONDUCTANCE DEGRADATION | - |
dc.subject.keywordPlus | THRESHOLD VOLTAGE | - |
dc.subject.keywordPlus | POLYSILICON | - |
dc.subject.keywordPlus | OXIDE | - |
dc.subject.keywordPlus | PASSIVATION | - |
dc.subject.keywordPlus | TRANSISTORS | - |
dc.subject.keywordAuthor | 3D NAND flash memory | - |
dc.subject.keywordAuthor | activation energy | - |
dc.subject.keywordAuthor | hydrogen post-treatment annealing | - |
dc.subject.keywordAuthor | interface trap | - |
dc.subject.keywordAuthor | energy band diagram | - |
dc.subject.keywordAuthor | retention | - |
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