Vertically Integrated Gate-tunable SiOx memristor for memory and programmable logic application
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Gunuk Wang | - |
dc.date.accessioned | 2021-08-27T21:49:28Z | - |
dc.date.available | 2021-08-27T21:49:28Z | - |
dc.date.created | 2021-04-22 | - |
dc.date.issued | 2018-08-27 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/18047 | - |
dc.publisher | 이화여대 | - |
dc.title | Vertically Integrated Gate-tunable SiOx memristor for memory and programmable logic application | - |
dc.title.alternative | Vertically Integrated Gate-tunable SiOx memristor for memory and programmable logic application | - |
dc.type | Conference | - |
dc.contributor.affiliatedAuthor | Gunuk Wang | - |
dc.identifier.bibliographicCitation | INPEC (2018) | - |
dc.relation.isPartOf | INPEC (2018) | - |
dc.relation.isPartOf | 2018 INPEC 초록집 | - |
dc.citation.title | INPEC (2018) | - |
dc.citation.conferencePlace | KO | - |
dc.citation.conferenceDate | 2018-08-27 | - |
dc.type.rims | CONF | - |
dc.description.journalClass | 2 | - |
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