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Analog CMOS-based resistive processing unit for deep neural network training

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dc.contributor.authorLee, Hyung-Min-
dc.date.accessioned2021-08-28T06:23:56Z-
dc.date.available2021-08-28T06:23:56Z-
dc.date.created2021-04-22-
dc.date.issued2017-08-07-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/22981-
dc.publisherIEEE-
dc.titleAnalog CMOS-based resistive processing unit for deep neural network training-
dc.title.alternativeAnalog CMOS-based resistive processing unit for deep neural network training-
dc.typeConference-
dc.contributor.affiliatedAuthorLee, Hyung-Min-
dc.identifier.bibliographicCitationIEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp.422 - 425-
dc.relation.isPartOfIEEE International Midwest Symposium on Circuits and Systems (MWSCAS)-
dc.relation.isPartOfInternational Midwest Symposium on Circuits and Systems (MWSCAS)-
dc.citation.titleIEEE International Midwest Symposium on Circuits and Systems (MWSCAS)-
dc.citation.startPage422-
dc.citation.endPage425-
dc.citation.conferencePlaceUS-
dc.citation.conferencePlaceBoston, MA, USA-
dc.citation.conferenceDate2017-08-06-
dc.type.rimsCONF-
dc.description.journalClass1-
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공과대학 (전기전자공학부)
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