A 7.5-GS/s 3.8-ENOB 52-mW flash ADC with clock duty cycle control in 65nm CMOS
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Hayun Cecillia Chung | - |
dc.date.accessioned | 2021-08-30T03:48:40Z | - |
dc.date.available | 2021-08-30T03:48:40Z | - |
dc.date.created | 2021-04-22 | - |
dc.date.issued | 2009-06-17 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/49962 | - |
dc.publisher | IEEE | - |
dc.title | A 7.5-GS/s 3.8-ENOB 52-mW flash ADC with clock duty cycle control in 65nm CMOS | - |
dc.title.alternative | A 7.5-GS/s 3.8-ENOB 52-mW flash ADC with clock duty cycle control in 65nm CMOS | - |
dc.type | Conference | - |
dc.contributor.affiliatedAuthor | Hayun Cecillia Chung | - |
dc.identifier.bibliographicCitation | Symposium on VLSI Circuits 2009, pp.268 - 269 | - |
dc.relation.isPartOf | Symposium on VLSI Circuits 2009 | - |
dc.relation.isPartOf | Proceedings of VLSI Circuits 2009 | - |
dc.citation.title | Symposium on VLSI Circuits 2009 | - |
dc.citation.startPage | 268 | - |
dc.citation.endPage | 269 | - |
dc.citation.conferencePlace | JA | - |
dc.citation.conferenceDate | 2009-06-16 | - |
dc.type.rims | CONF | - |
dc.description.journalClass | 1 | - |
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