Memory streaming acceleration for embedded systems with CPU-accelerator cooperative data processing
DC Field | Value | Language |
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dc.contributor.author | Lee, Kwangho | - |
dc.contributor.author | Kong, Joonho | - |
dc.contributor.author | Kim, Young Geun | - |
dc.contributor.author | Chung, Sung Woo | - |
dc.date.accessioned | 2021-09-01T01:13:33Z | - |
dc.date.available | 2021-09-01T01:13:33Z | - |
dc.date.created | 2021-06-19 | - |
dc.date.issued | 2019-11 | - |
dc.identifier.issn | 0141-9331 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/61994 | - |
dc.description.abstract | Memory streaming operations (i.e., memory-to-memory data transfer with or without simple arithmetic/logical operations) are one of the most important tasks in general embedded/mobile computer systems. In this paper, we propose a technique to accelerate memory streaming operations. The conventional way to accelerate memory streaming operations is employing direct memory access (DMA) with dedicated hardware accelerators for simple arithmetic/logical operations. In our technique, we utilize not only a hardware accelerator with DMA but also a central processing unit (CPU) to perform memory streaming operations, which improves the performance and energy efficiency of the system. We also implemented our prototype in a field-programmable gate array system-on-chip (FPGA-SoC) platform and evaluated our technique in real measurement from our prototype. From our experimental results, our technique improves memory streaming performance by 34.1-73.1% while reducing energy consumption by 29.0-45.5%. When we apply our technique to various real-world applications such as image processing, 1 x 1 convolution operations, and bias addition/scale, performances are improved by 1.1 x -2.4 x. In addition, our technique reduces energy consumptions when performing image processing, 1 x 1 convolution, and bias addition/scale by 7.9-17.7%, 46.8-57.7%, and 41.7-58.5%, respectively. (C) 2019 Elsevier B.V. All rights reserved. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | ELSEVIER | - |
dc.title | Memory streaming acceleration for embedded systems with CPU-accelerator cooperative data processing | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Chung, Sung Woo | - |
dc.identifier.doi | 10.1016/j.micpro.2019.102897 | - |
dc.identifier.scopusid | 2-s2.0-85072620894 | - |
dc.identifier.wosid | 000500052000007 | - |
dc.identifier.bibliographicCitation | MICROPROCESSORS AND MICROSYSTEMS, v.71 | - |
dc.relation.isPartOf | MICROPROCESSORS AND MICROSYSTEMS | - |
dc.citation.title | MICROPROCESSORS AND MICROSYSTEMS | - |
dc.citation.volume | 71 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Theory & Methods | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordAuthor | Heterogeneous computing | - |
dc.subject.keywordAuthor | Accelerator | - |
dc.subject.keywordAuthor | Stream operation | - |
dc.subject.keywordAuthor | Direct memory access | - |
dc.subject.keywordAuthor | Cooperative data transfer | - |
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