An Area and Power Efficient Interpolation Scheme Using Variable Current Control for 10-Bit Data Drivers in Mobile Active-Matrix LCDs

Abstract

This paper presents an area and power efficient interpolation scheme using variable current control (VCC) for 10-bit data drivers in mobile active-matrix LCDs. The VCC interpolation can be embedded in buffer amplifiers as sub-digital-to-analog converters (DACs), reducing the DAC area without requiring additional power and conversion time. Moreover, interpolation errors due to transistor nonlinearity can be compensated through delicate current ratio control, optimizing both accuracy and area efficiency of the high-resolution data driver. The prototype 10-bit data driver with a 6-bit resistor DAC and a 4-bit interpolation sub-DAC occupies the chip area of 460 mu m x 14 mu m per channel, which is 10.7% smaller than the conventional 8bit data driver. The data driver consumes static current of 1 mu A/channel without dissipating additional power for interpolation. The measured integral nonlinearity and differential nonlinearity are 0.4 LSB and 0.7 LSB, respectively. The proposed scheme has competitive performance in terms of driving accuracy, chip size shrinkage, and static power consumption for high-resolution data drivers.