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Design of a 6 bit 1.25 GS/s DAC for WPAN
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | KIM, Suk Ki | - |
| dc.date.accessioned | 2021-09-02T12:12:05Z | - |
| dc.date.available | 2021-09-02T12:12:05Z | - |
| dc.date.created | 2021-04-22 | - |
| dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/75883 | - |
| dc.publisher | IEEE | - |
| dc.title | Design of a 6 bit 1.25 GS/s DAC for WPAN | - |
| dc.type | Conference | - |
| dc.contributor.affiliatedAuthor | KIM, Suk Ki | - |
| dc.identifier.bibliographicCitation | International Symposium on Circuit and System | - |
| dc.relation.isPartOf | International Symposium on Circuit and System | - |
| dc.citation.title | International Symposium on Circuit and System | - |
| dc.citation.conferencePlace | US | - |
| dc.citation.conferenceDate | 2008-05-18 | - |
| dc.type.rims | CONF | - |
| dc.description.journalClass | 1 | - |
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