Reducing the contact and channel resistances of black phosphorus via low-temperature vacuum annealing
DC Field | Value | Language |
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dc.contributor.author | Park, Hyunik | - |
dc.contributor.author | Son, Jongha | - |
dc.contributor.author | Kim, Jihyun | - |
dc.date.accessioned | 2021-09-02T14:57:00Z | - |
dc.date.available | 2021-09-02T14:57:00Z | - |
dc.date.created | 2021-06-16 | - |
dc.date.issued | 2018-02-14 | - |
dc.identifier.issn | 2050-7526 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/77352 | - |
dc.description.abstract | The effects of post-fabrication vacuum annealing on the performance of black phosphorus (BP) field-effect transistors (FETs) were investigated. Ohmic contact to the BP layer was improved after vacuum annealing below 250 degrees C, showing better linearity in current-voltage output characteristics. In addition, the channel resistance was greatly improved from 39.5 to 0.299 k Omega mm after vacuum annealing over 200 degrees C due to the desorption of residues and adsorbates, which led to an enhanced device performance including a higher current injection efficiency, field-effect hole mobility (5.04 to 140 cm(2) V-1 s(-1)), current on/off ratio (2.34 to 370), lower Ohmic loss (17.8 to 0.103 k Omega mm), and less hysteresis. The field-effect hole mobilities and current on/off ratios of the BP FET device vacuum-annealed at 250 degrees C were found to be 28 and 158 times higher, respectively, than those of the as-fabricated device. However, the device performance deteriorated after vacuum annealing over 300 degrees C owing to the catalytic amorphization of BP caused by the metal electrodes. Our results pave the way towards the development of high-performance BP-based devices with minimal parasitic elements via low-temperature vacuum annealing. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | ROYAL SOC CHEMISTRY | - |
dc.subject | FIELD-EFFECT TRANSISTORS | - |
dc.subject | MULTILAYER MOS2 TRANSISTORS | - |
dc.subject | SCHOTTKY | - |
dc.title | Reducing the contact and channel resistances of black phosphorus via low-temperature vacuum annealing | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Jihyun | - |
dc.identifier.doi | 10.1039/c7tc05325h | - |
dc.identifier.scopusid | 2-s2.0-85041547743 | - |
dc.identifier.wosid | 000424652000035 | - |
dc.identifier.bibliographicCitation | JOURNAL OF MATERIALS CHEMISTRY C, v.6, no.6, pp.1567 - 1572 | - |
dc.relation.isPartOf | JOURNAL OF MATERIALS CHEMISTRY C | - |
dc.citation.title | JOURNAL OF MATERIALS CHEMISTRY C | - |
dc.citation.volume | 6 | - |
dc.citation.number | 6 | - |
dc.citation.startPage | 1567 | - |
dc.citation.endPage | 1572 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | FIELD-EFFECT TRANSISTORS | - |
dc.subject.keywordPlus | MULTILAYER MOS2 TRANSISTORS | - |
dc.subject.keywordPlus | SCHOTTKY | - |
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