Capless LDO Regulator Achieving-76 dB PSR and 96.3 fs FOM
- Authors
- Yun, Seong Jin; Kim, Jeong Seok; Kim, Yong Sin
- Issue Date
- 10월-2017
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Low-dropout (LDO) regulator; negative capacitance; power supply rejection (PSR)
- Citation
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.64, no.10, pp.1147 - 1151
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
- Volume
- 64
- Number
- 10
- Start Page
- 1147
- End Page
- 1151
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/82116
- DOI
- 10.1109/TCSII.2016.2628965
- ISSN
- 1549-7747
- Abstract
- The performance of switching devices such as display driver ICs is degraded by large power supply noise at switching frequencies from a few hundreds of kilohertz to a few megahertz. In order to minimize the power supply noise, a low-dropout (LDO) regulator with higher power supply rejection (PSR) is essential. In this brief, a capless LDO regulator with a negative capacitance circuit and voltage damper is proposed for enhancing PSR and figure of merit (FOM), respectively, in switching devices. The proposed LDO regulator is fabricated in a 0.18 mu m CMOS. Measurement results show that the proposed LDO regulator achieves -76 dB PSR at 1 MHz and 96.3 fs FOM with a total on-chip capacitance of as small as 12.7 pF.
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