A 1.62-5.4-Gb/s Receiver for DisplayPort Version 1.2a With Adaptive Equalization and Referenceless Frequency Acquisition Techniques
DC Field | Value | Language |
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dc.contributor.author | Hwang, Sewook | - |
dc.contributor.author | Song, Junyoung | - |
dc.contributor.author | Lee, Yeonho | - |
dc.contributor.author | Kim, Chulwoo | - |
dc.date.accessioned | 2021-09-03T01:00:58Z | - |
dc.date.available | 2021-09-03T01:00:58Z | - |
dc.date.created | 2021-06-18 | - |
dc.date.issued | 2017-10 | - |
dc.identifier.issn | 1549-8328 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/82157 | - |
dc.description.abstract | We present a 1.62-5.4-Gb/s receiver for DisplayPort version 1.2a and propose an adaptive equalizer (EQ) with a peak-level comparison technique for eye measurement. A single comparator and an up/down unmatched-current charge pump are used to realize a simpler EQ architecture with low power dissipation. A referenceless frequency acquisition technique is also proposed. A time-to-digital converter-based pulsewidth detector supports the referenceless frequency acquisition within the range of 1.62-5.4 Gb/s. An XOR-gate-embedded charge pump and a half-rate linear phase detector were used to improve the jitter tolerance (JTOL) performance. The measured eye opening of the proposed EQ at 5.4 Gb/s was 0.68 UI with a -20-dB loss channel. The proposed receiver passed all the JTOL tests of the DisplayPort compliance specification version 1.2b. The power consumption of the receiver was 36.8 mW at 5.4 Gb/s. The receiver occupied a core area of 0.265 mm(2) using 65-nm CMOS process technology. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | PHASE | - |
dc.subject | CMOS | - |
dc.title | A 1.62-5.4-Gb/s Receiver for DisplayPort Version 1.2a With Adaptive Equalization and Referenceless Frequency Acquisition Techniques | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Chulwoo | - |
dc.identifier.doi | 10.1109/TCSI.2017.2695612 | - |
dc.identifier.scopusid | 2-s2.0-85019835278 | - |
dc.identifier.wosid | 000413831600005 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.64, no.10, pp.2691 - 2702 | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
dc.citation.title | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
dc.citation.volume | 64 | - |
dc.citation.number | 10 | - |
dc.citation.startPage | 2691 | - |
dc.citation.endPage | 2702 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | PHASE | - |
dc.subject.keywordPlus | CMOS | - |
dc.subject.keywordAuthor | Receiver (Rx) | - |
dc.subject.keywordAuthor | adaptive equalizer (EQ) | - |
dc.subject.keywordAuthor | referenceless | - |
dc.subject.keywordAuthor | clock and data recovery (CDR) | - |
dc.subject.keywordAuthor | frequency detector | - |
dc.subject.keywordAuthor | DisplayPort | - |
dc.subject.keywordAuthor | compliance test | - |
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