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Vertical Split Ring Resonator Using Vias With Wide Bandwidth and Small Electrical Size
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Choi, Jongwon | - |
| dc.contributor.author | Oh, Sangyeol | - |
| dc.contributor.author | Jo, Sangjin | - |
| dc.contributor.author | Yoon, Won-Sang | - |
| dc.contributor.author | Lee, Jaehoon | - |
| dc.date.accessioned | 2021-09-03T11:28:14Z | - |
| dc.date.available | 2021-09-03T11:28:14Z | - |
| dc.date.created | 2021-06-16 | - |
| dc.date.issued | 2017-01 | - |
| dc.identifier.issn | 1531-1309 | - |
| dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/85044 | - |
| dc.description.abstract | In this letter, we propose a vertically inserted split ring resonator (SRR) in microstrip lines. Since the top and bottom layers of the resonator are electrically connected by using via holes and it has a 3-D shape, it occupies a small electrical size. Through numerical simulations and measurement, it is shown that it can provide a wider range variation of bandwidth than conventional planar SRRs and the resonant frequency and the bandwidth can be adjusted by its length and width, respectively. | - |
| dc.language | English | - |
| dc.language.iso | en | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.title | Vertical Split Ring Resonator Using Vias With Wide Bandwidth and Small Electrical Size | - |
| dc.type | Article | - |
| dc.contributor.affiliatedAuthor | Lee, Jaehoon | - |
| dc.identifier.doi | 10.1109/LMWC.2016.2629988 | - |
| dc.identifier.scopusid | 2-s2.0-85003721875 | - |
| dc.identifier.wosid | 000393795300006 | - |
| dc.identifier.bibliographicCitation | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.27, no.1, pp.16 - 18 | - |
| dc.relation.isPartOf | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | - |
| dc.citation.title | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | - |
| dc.citation.volume | 27 | - |
| dc.citation.number | 1 | - |
| dc.citation.startPage | 16 | - |
| dc.citation.endPage | 18 | - |
| dc.type.rims | ART | - |
| dc.type.docType | Article | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.subject.keywordAuthor | Electrical size reduction | - |
| dc.subject.keywordAuthor | loaded bandwidth | - |
| dc.subject.keywordAuthor | metamaterials | - |
| dc.subject.keywordAuthor | vertical split ring resonator (VSRR) | - |
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