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Optimal Memory Size Formula for Moving-Average Digital Phase-Locked Loop

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dc.contributor.authorAhn, Choon Ki-
dc.contributor.authorShi, Peng-
dc.contributor.authorYou, Sung Hyun-
dc.date.accessioned2021-09-03T16:07:57Z-
dc.date.available2021-09-03T16:07:57Z-
dc.date.created2021-06-16-
dc.date.issued2016-12-
dc.identifier.issn1070-9908-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/86623-
dc.description.abstractThis letter proposes a new moving-average form of digital phase-locked loop (DPLL) that uses the average value of measurements on a memory horizon and the correction term to estimate phase information. This ensures the desired unbiasedness property for the phase information. A new formula for the optimal memory size of the proposed DPLL with minimization of the expected squared phase error is established. A numerical example is given to show that the developed DPLL has superior robustness against quantization and incorrect noise compared to the existing DPLLs.-
dc.languageEnglish-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectFILTERS-
dc.subjectALGORITHM-
dc.subjectSYSTEMS-
dc.titleOptimal Memory Size Formula for Moving-Average Digital Phase-Locked Loop-
dc.typeArticle-
dc.contributor.affiliatedAuthorAhn, Choon Ki-
dc.identifier.doi10.1109/LSP.2016.2623520-
dc.identifier.scopusid2-s2.0-85012925180-
dc.identifier.wosid000389339700002-
dc.identifier.bibliographicCitationIEEE SIGNAL PROCESSING LETTERS, v.23, no.12, pp.1844 - 1847-
dc.relation.isPartOfIEEE SIGNAL PROCESSING LETTERS-
dc.citation.titleIEEE SIGNAL PROCESSING LETTERS-
dc.citation.volume23-
dc.citation.number12-
dc.citation.startPage1844-
dc.citation.endPage1847-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusFILTERS-
dc.subject.keywordPlusALGORITHM-
dc.subject.keywordPlusSYSTEMS-
dc.subject.keywordAuthorDigital phase-locked loop (DPLL)-
dc.subject.keywordAuthormoving average-
dc.subject.keywordAuthoroptimal memory size-
dc.subject.keywordAuthorrobustness-
dc.subject.keywordAuthorunbiasedness-
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