Automated test case generation for FBD programs implementing reactor protection system software
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jee, Eunkyoung | - |
dc.contributor.author | Shin, Donghwan | - |
dc.contributor.author | Cha, Sungdeok | - |
dc.contributor.author | Lee, Jang-Soo | - |
dc.contributor.author | Bae, Doo-Hwan | - |
dc.date.accessioned | 2021-09-05T02:20:58Z | - |
dc.date.available | 2021-09-05T02:20:58Z | - |
dc.date.created | 2021-06-15 | - |
dc.date.issued | 2014-12 | - |
dc.identifier.issn | 0960-0833 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/96567 | - |
dc.description.abstract | Automated and effective testing for function block diagram (FBD) programs has become an important issue, as FBD is increasingly used in implementing safety-critical systems. This work describes an automated test case generation technique for FBD programs and its associated toolFBDTester. Given an FBD program and desired test coverage criteria, FBDTester generates test requirements and invokes the Satisfiability Modulo Theories solver iteratively to derive a set of test cases. An industrial case study using reactor protection system software shows that the automatically generated test suites detected at least 82% of the known faults, whereas manually generated test cases only detected approximately 35%. Mutation analysis revealed that the automatically generated test suites substantially outperformed manually generated ones. Although test sequence generation requires some manual effort in the current FBDTester, it is apparent that the proposed approach significantly improves the efficiency and the reliability of FBD testing. Copyright (c) 2014 John Wiley & Sons, Ltd. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | WILEY | - |
dc.subject | VERIFICATION | - |
dc.subject | VALIDATION | - |
dc.title | Automated test case generation for FBD programs implementing reactor protection system software | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Cha, Sungdeok | - |
dc.identifier.doi | 10.1002/stvr.1548 | - |
dc.identifier.scopusid | 2-s2.0-84911432036 | - |
dc.identifier.wosid | 000345214800003 | - |
dc.identifier.bibliographicCitation | SOFTWARE TESTING VERIFICATION & RELIABILITY, v.24, no.8, pp.608 - 628 | - |
dc.relation.isPartOf | SOFTWARE TESTING VERIFICATION & RELIABILITY | - |
dc.citation.title | SOFTWARE TESTING VERIFICATION & RELIABILITY | - |
dc.citation.volume | 24 | - |
dc.citation.number | 8 | - |
dc.citation.startPage | 608 | - |
dc.citation.endPage | 628 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Software Engineering | - |
dc.subject.keywordPlus | VERIFICATION | - |
dc.subject.keywordPlus | VALIDATION | - |
dc.subject.keywordAuthor | automated test case generation | - |
dc.subject.keywordAuthor | function block diagram | - |
dc.subject.keywordAuthor | SMT solver | - |
dc.subject.keywordAuthor | programmable logic controller | - |
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