Covered Source-Channel Tunnel Field-Effect Transistors With Trench Gate Structures

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초록

We propose a new design for covered source-channel tunnel field-effect transistors (CSC-TFETs) with trench gate structures. The I-V characteristics, ON/OFF current ratio, subthreshold swing, and band-to-band tunneling rate are analyzed using a commercial device simulator. Our proposed CSC-TFETs exhibit an ON/OFF current ratio of approximately 10(10), an ON-current of approximately 10(-5) A/mu m at room temperature, and a subthreshold swing of less than 40 mV/decade. In addition, the ON-current of the CSC-TFETs is similar to 233 times that of conventional TFETs, demonstrating that the switching characteristics are superior to those of other silicon-based TFETs. Moreover, a CSC-TFET inverter is characterized by SPICE calibration and provides a high frequency of approximately 1 GHz at a supply voltage of 1.0 V.

키워드

Tunnel field-effect transistorsTCAD simulationSPICE modelcovered source-channel TFETtrench gateSTRAINED SIFETSLOGICDESIGN
제목
Covered Source-Channel Tunnel Field-Effect Transistors With Trench Gate Structures
저자
Woo, SolaKim, Sangsig
DOI
10.1109/TNANO.2018.2882859
발행일
2019
유형
Article
저널명
IEEE Transactions on Nanotechnology
18
페이지
114 ~ 118