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Non-linear MLE-based digital equaliser for ADC-based backplane receivers
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Analogue-to-digital-converter-based (ADC-based) backplane receivers have been widely studied in recent years as ever-increasing data rate calls for strong equalisation. However, despite their ability to support various types of digital equalisation techniques, most receivers rely on linear finite-impulse-response-filter-based (FIR-filter-based) equalisers that are susceptible to quantisation error of the front-end ADC. This Letter proposes a non-linear maximum-likelihood-estimation-based (MLE-based) equaliser that utilises channel output distribution and probability theory to make bit decisions. The proposed nonlinear algorithm achieves robust performance against quantisation noise of the front-end ADC. Moreover, a feed-forward equaliser can be implemented without involving multi-bit multipliers and adders that cause serious hardware complexity overhead. Simulation results suggest that the proposed MLE-based equaliser can improve bit error rate (BER) by 10(10) times with a 5-bit front-end ADC and save front-end ADC bit resolution by more than 0.8 bits with BER of 10(-15), when compared with the conventional FIR-filter-based equaliser.
- 제목
- Non-linear MLE-based digital equaliser for ADC-based backplane receivers
- 저자
- Chung, H.
- 발행일
- 2016-06-23
- 유형
- Article
- 권
- 52
- 호
- 13
- 페이지
- 1106 ~ 1107
- 언어
- ENG
- 출판사
- INST ENGINEERING TECHNOLOGY-IET
- 발행국가
- 영국
- 분량
- 2 페이지
- ISSN
- E 1350-911X
P 0013-5194