Unraveling the role of post-annealing in IGZO transistor for memory applications

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초록

We demonstrate that post-annealing techniques are important for achieving the transfer characteristics of indium-gallium-zinc oxide (IGZO) transistors and identify that their role depends on the sputter-deposited IGZO film conditions. The as-fabricated transistor with a thin IGZO channel, HfO2 gate dielectric, and Mo gate electrode exhibits a constant drain current (IDS) over gate voltage (VGS). Although the oxygen (O2) plasma gas rate is adjusted from 0.2 to 1 sccm with an argon gas rate of 30 sccm during IGZO deposition, the IDS level was reduced by a factor of 104. Notably, VGS-controlled transfer behavior of the transistors only starts after post-annealing is performed at temperatures above 300 degrees C, regardless of which IGZO channel properties are used. More specifically, since oxygen vacancies (VOs) serve as carriers in the IGZO, annealing in different O2 gas or air environments to generate or reduce the number of VOs is found to be optimal for the VO-rich or VO-poor channels, respectively. In this study, we reveal that oxidation annealing appears to be a more effective way for achieving improved gate controllability (e.g., subthreshold swing). Accordingly, we further analyze how the VOs in the IGZO are involved in switching by examining the effect of annealing temperature and gate dielectric materials on the transfer curve. These results indicate that VOs in the bulk need to be annihilated to lower the off-state IDS, while a sufficient number of VOs near the channel and gate dielectric interface should be ensured to responded by VGS for rapid switching.

키워드

IGZO; Transistor; FILM; INTEGRATION
제목
Unraveling the role of post-annealing in IGZO transistor for memory applications
저자
Kim, Nayeon; Jeong, Jiae; Lee, Jae Woo; Woo, Jiyong
DOI
10.1016/j.mee.2025.112322
발행일
2025-06-01
유형
Article
저널명
Microelectronic Engineering
권
298