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Effect of post-fabrication thermal annealing on Fermi-level pinning phenomenon in metal-pentacene junctions
- Jeong, Seong-Guk;
- Park, Hyung-Youl;
- Lim, Myung-Hoon;
- Jung, Woo-Shik;
- Yu, Hyun-Yong;
- 외 2명
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6초록
In this work, we investigated the material properties of pentacene films with XRD and AFM analyses as it were annealed from 25 to 150 degrees C in N-2 ambient. Electrical characterization of the films was also performed by transfer length method (TLM) at each temperature. These results were then correlated with the Fermi level pinning phenomenon in Al- and Ti-pentacene junctions. For both junctions, it was found that as the surface quality of the pentacene films changed with increase in annealing temperature, the hole-barrier heights (h-BH) that were modulated by Fermi level pinning were effectively reduced. (C) 2012 Elsevier B. V. All rights reserved.
키워드
Pentacene; Fermi-level pinning; Metal-pentacene; THIN-FILM TRANSISTORS; FIELD-EFFECT TRANSISTORS; TEMPERATURE; MORPHOLOGY; INJECTION; CONTACT
- 제목
- Effect of post-fabrication thermal annealing on Fermi-level pinning phenomenon in metal-pentacene junctions
- 저자
- Jeong, Seong-Guk; Park, Hyung-Youl; Lim, Myung-Hoon; Jung, Woo-Shik; Yu, Hyun-Yong; Roh, Yonghan; Park, Jin-Hong
- 발행일
- 2012-09
- 유형
- Article
- 권
- 13
- 호
- 9
- 페이지
- 1511 ~ 1515
- 언어
- ENG
- 출판사
- ELSEVIER SCIENCE BV
- 발행국가
- 네덜란드
- 분량
- 5 페이지
- ISSN
- E 1878-5530
P 1566-1199