Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors

  • Hong, Suk Bum; 
  • Park, Ju Hyun; 
  • Lee, Tae Ho; 
  • Lim, Jun Hee; 
  • Shin, Changhwan; 
  • ... Kim, Tae Geun; 
  • 외 1명
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초록

This study presents the improved memory properties of TiN/Al2O3/Si3N4/SiO2/poly-Si (TANOS) capacitors after rapid thermal annealing (RTA) and high-pressure annealing processes (HPAP) using H-2 and D-2 molecules. First, it was confirmed that the recrystallization rate, and thus the grain size of the poly-silicon (poly-Si) film, increased with an increase of the RTA temperature, eventually improving the performance of the TANOS capacitor by reducing the trap densities at the poly-Si/SiO2 interface. Then, it was found that device performance parameters, such as program/erase speed and data retention, could be further improved through HPAP owing to the passivation of band gap states at the poly-Si channel grain boundary. Finally, it was confirmed that these improvements can be observed at a transistor level in the same fashion using the Silvaco TCAD simulation. (C) 2017 Elsevier B.V. All rights reserved.

키워드

Poly-silicon channel; Interface trap; Grain boundary; TANOS; Rapid thermal annealing; ELECTRICAL-PROPERTIES; POLYSILICON; TRANSPORT; MOBILITY
제목
Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors
저자
Hong, Suk Bum; Park, Ju Hyun; Lee, Tae Ho; Lim, Jun Hee; Shin, Changhwan; Park, Young Woo; Kim, Tae Geun
DOI
10.1016/j.apsusc.2017.11.226
발행일
2019-05-31
유형
Article; Proceedings Paper
저널명
Applied Surface Science
권
477
페이지
104 ~ 110