Low-temperature electrical characterization of junctionless transistors

Jeon, Dae-Young; Park, So Jeong; Mouis, Mireille; Barraud, Sylvain; Kim, Gyu-Tae; Ghibaudo, Gerard

doi:10.1016/j.sse.2012.10.018

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Low-temperature electrical characterization of junctionless transistors

Jeon, Dae-Young;
Park, So Jeong;
Mouis, Mireille;
Barraud, Sylvain;
Kim, Gyu-Tae;
외 1명

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85

초록

The electrical performance of junctionless transistors (JLTs) with planar structures was investigated under low-temperature and compared to that of the traditional inversion-mode (IM) transistors. The low-field mobility (mu(o)) of JLT devices was found to be limited by phonon and neutral defects scattering mechanisms for long gate lengths, whereas scattering by charged and neutral defects mostly dominated for short gate lengths, likely due to the defects induced by the source/drain (S/D) implantation added in the process. Moreover, the temperature dependence of flat-band voltage (V-fb), threshold voltage (V-th) and subthreshold swing (S) of JLT devices was also discussed. (C) 2012 Elsevier Ltd. All rights reserved.

키워드

Junctionless transistors (JLTs); Scattering mechanisms; Implantation induced defects; Flat-band voltage (V-fb); Threshold voltage (V-th); NANOWIRE TRANSISTORS

제목: Low-temperature electrical characterization of junctionless transistors

저자: Jeon, Dae-Young; Park, So Jeong; Mouis, Mireille; Barraud, Sylvain; Kim, Gyu-Tae; Ghibaudo, Gerard

DOI: 10.1016/j.sse.2012.10.018

발행일: 2013-02

유형: Article

저널명: Solid-State Electronics

권: 80

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