A 6 Gb/s transmitter with data-dependent jitter reduction technique for displayport physical layer

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초록

In this paper, a 6 Gb/s transmitter with data-dependent jitter (DDJ) reduction technique for DisplayPort physical layer is presented. We propose a novel technique to minimize DDJ introduced while the output driver is operating with pre-emphasis mode, which is called DDJ reduction technique. The output driver circuit is designed in 0.13 mu m 1P6 M CMOS process and fully compliant to the DisplayPort standard. With the proposed technique, observed DDJ at the output of the driver is reduced from 10 ps to under 1 ps while the output driver producing 400 mV output swing with 6 dB pre-emphasis. The output driver consumes minimum 66 mW and adopts 1.2 V supply voltage for core and 3.3 V supply voltage for I/O including pre-drivers.

키워드

Output driverHigh-speed serial linkPre-emphasisData-dependent jitterDisplayPortPHASE
제목
A 6 Gb/s transmitter with data-dependent jitter reduction technique for displayport physical layer
저자
Song, JunyoungHwang, SewookKim, ChulwooBae, Sang-Geun
DOI
10.1007/s10470-014-0407-9
발행일
2014-11
유형
Article
저널명
Analog Integrated Circuits and Signal Processing
81
2
페이지
529 ~ 536