A 140-Mb/s to 1.82-Gb/s Continuous-Rate Embedded Clock Receiver for Flat-Panel Displays

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SCOPUS

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초록

A wide-range fast-locking embedded clock receiver, which can provide a continuous data rate of 140 Mb/s to 1.82 Gb/s in a 0.25-mu m CMOS process, is presented. A fast lock time of 7.5 mu s and a small root-mean-square jitter of 15 ps are achieved by using the proposed frequency-band selection and frequency acquisition schemes, as well as a simple linear-phase detector. The implemented embedded clock receiver occupies 2.00 mm(2) and consumes currents of 44 and 137 mA at 140 Mb/s and 1.82 Gb/s, respectively, including input/output currents.

키워드

Clock and data recovery (CDR); embedded clock; receiver; ACQUISITION
제목
A 140-Mb/s to 1.82-Gb/s Continuous-Rate Embedded Clock Receiver for Flat-Panel Displays
저자
Jung, Inhwa; Shin, Daejung; Kim, Taejin; Kim, Chulwoo
DOI
10.1109/TCSII.2009.2030533
발행일
2009-10
유형
Article
저널명
IEEE Transactions on Circuits and Systems II: Express Briefs
권
56
호
10
페이지
773 ~ 777