A 15-Gb/s PAM-3 Transceiver With Hybrid Equalization and Time-Domain Decoder for High-Bandwidth-Memory Interfaces

  • Shin, Hwaseok; 
  • Choi, Yoonjae; 
  • Sim, Jincheol; 
  • Kwon, Youngwook; 
  • Park, Seungwoo; 
  • ... Kim, Chulwoo; 
  • 외 5명
Citations

SCOPUS

6

초록

This study presents a 15-Gb/s three-level pulse amplitude modulation (PAM-3) transceiver (TRX) with a hybrid equalizer and a time-domain decoder using a low supply voltage for high-bandwidth-memory (HBM) interfaces in a 28-nm CMOS technology. To achieve low power consumption in next-generation HBM interfaces, the transmitter employs a hybrid equalizer composed of integrated pulsewidth modulation, a voltage mode feed-forward equalizer, and a delay line controller (DLC). The proposed hybrid equalizer technique reduces input/output capacitance, minimizes bandwidth degradation, and provides effective inter-symbol interference equalization and significant power reduction. The receiver utilizes a time-domain decoder, which halves the number of comparators and reference voltages compared to conventional decoder methods, minimizing hardware cost and design complexity. Additionally, using a low supply voltage in the decoder results in a slower rising slope of the comparator’s output, increasing the decodable range and enhancing power efficiency. Consequently, the proposed TRX achieves a 15-Gb/s data rate with an energy efficiency of 0.253 pJ/bit and occupies 0.0135 mm2. © 1966-2012 IEEE.

키워드

Equalization; high-bandwidth memory (HBM); low-power memory interface; receiver (RX); three-level pulse amplitude modulation (PAM-3); transmitter (TX)
제목
A 15-Gb/s PAM-3 Transceiver With Hybrid Equalization and Time-Domain Decoder for High-Bandwidth-Memory Interfaces
저자
Shin, Hwaseok; Choi, Yoonjae; Sim, Jincheol; Kwon, Youngwook; Park, Seungwoo; Kim, Seongcheol; Sim, Changmin; So, Junseob; Lee, Seon-Been; Kim, Taehwan; Kim, Chulwoo
DOI
10.1109/JSSC.2025.3557795
발행일
2026
유형
Article
저널명
IEEE Journal of Solid-State Circuits
권
61
호
1
페이지
305 ~ 317