머신 러닝 모델을 활용한 웨이퍼 불량 탐지 및 테스트 항목 효율화

초록

Wafer testing is one of the key components of the semiconductor manufacturing process and aims to balance maximum production with the highest quality. However, there is a problem that it is difficult to preemptively respond to the changing environment due to the ultra-fine semiconductor process, the quality risk caused by the production of various products, and the lack of professional engineers. Therefore, in this work, we present a framework for determining the optimal set of wafer test items representing high defect wafer detection rates using machine learning models. The proposed framework applies an effective sampling methodology to solve category imbalances, mostly composed of good chips, and uses ensemble classification models and important feature selection methods to achieve high classification performance in a short time without direct wafer evaluation. We demonstrate the proposed methodology has a meaningful effectiveness on time reduction through classification accuracy and test item reduction using real DRAM chip datasets.

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