Robustness-Aware Multi-Objective Design Technology Co-Optimization Framework for Computing-in-Memory Using Surrogate-Assisted SPEA2

초록

Computing-in-memory (CIM), which integrates memory for storing neural network weights with in-memory processing units, is a promising artificial intelligence (AI) accelerator owing to its high density and energy efficiency. In CIM design, interdependent device and circuit parameters significantly impact overall performance and expand the design space, requiring novel optimization methodologies to achieve high energy efficiency and throughput. In this paper, we present a surrogate-assisted design technology co-optimization (DTCO) framework that jointly considers device- and circuit-level parameters, such as device dimensions, voltage levels, and clock frequency to maximize CIM performance. The proposed data-driven optimization framework integrates electronic design automation (EDA) tools, machine learning, the strength Pareto evolutionary algorithm, and a robustness score to efficiently explore a high-dimensional objective space with complex trade-offs while reducing computational cost. Optimal design parameters are identified using a robustness-scoring method that evaluates both performance and resilience to process variation, after which an inverse-design approach is applied to implement the CIM macro. The framework demonstrates high predictive accuracy, with mean off-grid normalized errors below 5% across all four objectives. By applying inverse design with the optimized parameters, our CIM macro achieves an energy efficiency of 10361 TOPS/W and a throughput of 12.05 TOPS in simulation, along with 89.08% accuracy on the CIFAR-10 dataset. This DTCO approach effectively addresses complex semiconductor design problems by co-optimizing device and circuit parameters and is extendable to other design challenges.

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