상세 보기
A Low-Power Programmable DLL-Based Clock Generator With Wide-Range Antiharmonic Lock
- Koo, Jabeom;
- Ok, Sunghwa;
- Kim, Chulwoo
Citations
WEB OF SCIENCE
12Citations
SCOPUS
19초록
A delay-locked-loop (DLL)-based clock generator for dynamic frequency scaling has been developed in a 0.13-mu m CMOS technology. The proposed clock generator can generate a wide range of the multiplied clock signals ranging from 125 MHz to 2 GHz. In addition, owing to the proposed antiharmonic-lock block, the clock generator can change the frequency dynamically in one cycle time of the reference clock. The proposed DLL-based clock generator occupies 0.019 mm(2) and consumes 21 mW at 2 GHz. The ratio of power consumption to frequency of the proposed clock generator is smaller than those of conventional ones.
키워드
Antiharmonic lock; frequency multiplier; MULTIPLIER
- 제목
- A Low-Power Programmable DLL-Based Clock Generator With Wide-Range Antiharmonic Lock
- 저자
- Koo, Jabeom; Ok, Sunghwa; Kim, Chulwoo
- 발행일
- 2009-01
- 유형
- Article
- 권
- 56
- 호
- 1
- 페이지
- 21 ~ 25
- 언어
- ENG
- 출판사
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- 발행국가
- 미국
- 분량
- 5 페이지
- ISSN
- E 1558-3791
P 1549-7747