A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors

A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors
제목
A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors
제목 (타언어)
A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors
저자
Junghee Lee
발행일
2016-05-20
학회명
ACM International Conference on Great Lakes Symposium on VLSI
개최국가
미국
학회 개최일
2016-05-18 ~ 2016-05-20