Vertical NOR-logic circuits constructed using nanoparticle films on plastic substrates

  • Choi, Jinyong; 
  • Yun, Junggwon; 
  • Cho, Kyoungah; 
  • Kim, Sangsig
Citations

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초록

In this study, a NOR-logic circuit is constructed by the vertical stacking of three individual thin-film transistors (TFTs) with the channels of solution-processed chalcogenide nanoparticle (NP) films on a plastic substrate. The NOR-logic circuit consists of two p-type HgTe NP-based TFTs, which act as drivers, and one n-type HgSe NP-based TFT, which plays the role of an active load. The logic operation is observed with a substantial difference in V-out between the logic state of "00" and the other logic states, and the logic swing is similar to 60%. (C) 2014 The Japan Society of Applied Physics

키워드

HYSTERESIS; TRANSISTOR; TEMPERATURE; DIELECTRICS
제목
Vertical NOR-logic circuits constructed using nanoparticle films on plastic substrates
저자
Choi, Jinyong; Yun, Junggwon; Cho, Kyoungah; Kim, Sangsig
DOI
10.7567/JJAP.53.08NE02
발행일
2014-08
유형
Article
저널명
Japanese Journal of Applied Physics
권
53
호
8