Scaling down of amorphous indium gallium zinc oxide thin film transistors on the polyethersulfone substrate employing the protection layer of parylene-C for the large-scale integration

  • Chang, Seongpil
  • Dong, Ki-Young
  • Park, Jung-Ho
  • Oh, Tae-Yeon
  • Kim, Jong-Woo
  • ... Ju, Byeong-Kwon
  • 외 1명
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초록

We have investigated the parylene-groups for the device scaling-down as the protection layer of polyethersulfone (PES) substrate. In general, photolithography process on the PES substrate could not be allowed due to its poor chemical resistance. In this work, parylene-C is used as the protection layer. However, adhesion problem is observed caused by the hydrophobic property of parylene-groups. Thereby we additionally used SiO2 as the adhesion layer. Finally, we demonstrated the scaling-down of amorphous indium gallium zinc oxide thin film transistor on a plastic substrate by using lithography technique. Field-effect mobility, threshold voltage, current on-to-off ratio are measured to be 0.84 cm(2)/V s, 19.7 V, and 7.62x10(4), respectively. (C) 2010 American Institute of Physics. [doi:10.1063/1.3454775]

키워드

adhesioncarrier mobilityflexible electronicsgallium compoundshydrophobicityII-VI semiconductorsindium compoundslarge scale integrationphotolithographythin film transistorswide band gap semiconductorszinc compounds
제목
Scaling down of amorphous indium gallium zinc oxide thin film transistors on the polyethersulfone substrate employing the protection layer of parylene-C for the large-scale integration
저자
Chang, SeongpilDong, Ki-YoungPark, Jung-HoOh, Tae-YeonKim, Jong-WooLee, Sang YeolJu, Byeong-Kwon
DOI
10.1063/1.3454775
발행일
2010-06-14
유형
Article
저널명
Applied Physics Letters
96
24