Silicon nanowire CMOS NOR logic gates featuring one-volt operation on bendable substrates

  • Moon, Jeongje; 
  • Kim, Yoonjoong; 
  • Lim, Doohyeok; 
  • Kim, Sangsig
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초록

In this study, we propose complementary metal-oxide-semiconductor (CMOS) NOR logic gates consisting of silicon nanowire (NW) arrays on bendable substrates. A circuit consisting of two p-channel NW field-effect transistors (NWFETs) in series and two n-channel NWFETs in parallel is constructed to operate a two-input CMOS NOR logic gate. The NOR logic gates operate at a low supply voltage of 1 V with a rail-to-rail logic swing and a high voltage gain of approximately -3.0. The exact NOR logic functionality is achieved owing to the superior electrical characteristics of the well-aligned p- and n-NWFETs, which are obtained using conventional Si-based CMOS technology. Moreover, the NOR logic gates exhibit stable characteristics and have good mechanical properties. The proposed bendable NW CMOS NOR logic gates are promising building blocks for future bendable integrated electronics.

키워드

field-effect transistor; silicon nanowire; NOR logic gate; bendable substrate; FIELD-EFFECT TRANSISTORS; ZNO-NANOWIRE; CIRCUITS; DEVICES; ELECTRONICS; DESIGN; ARRAYS; SCALE
제목
Silicon nanowire CMOS NOR logic gates featuring one-volt operation on bendable substrates
저자
Moon, Jeongje; Kim, Yoonjoong; Lim, Doohyeok; Kim, Sangsig
DOI
10.1007/s12274-017-1889-4
발행일
2018-05
유형
Article
저널명
Nano Research
권
11
호
5
페이지
2625 ~ 2631