A 115.6-156.1-GHz Wideband Low-Noise Amplifier in 65-nm CMOS Technology

초록

This letter presents a D-band wideband low-noise amplifier (LNA) fabricated in a 65-nm CMOS technology. The LNA employs a five-stage pseudo-differential common-source topology, along with a staggered matching technique with low-coupling-coefficient (low-k) transformers. To mitigate gain and phase imbalance as well as to reduce the noise figure (NF) and its in-band fluctuations, a transformer-based input matching network with zero-Omega transmission line (ZTL) is introduced. As a result, the LNA achieves a peak gain of 18.0 dB, a 3-dB bandwidth (BW) of 40.5 GHz (115.6-156.1 GHz), and an NF down to 5.74 dB over its BW. NF was measured by three different methods, which showed consistent results across the 3-dB BW. The measured IP1dB is -16.1 dBm at 140 GHz, and the LNA dissipates a total dc power of 33 mW with a 1-V supply.

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