A 1.35V-5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty cycle corrector

A 1.35V-5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty cycle corrector
제목
A 1.35V-5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty cycle corrector
제목 (타언어)
A 1.35V-5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty cycle corrector
저자
KIM, Chulwoo
발행일
2013-02-13
학회명
IEEE International Solid-State Circuits Conference
개최국가
미국
학회 개최일
2014-02-09 ~ 2014-02-13