상세 보기
Reconfigurable Logic Gates Capable of Device-Level Parallel Processing Through Multi-Input Synaptic Device
- Roe, Dong Gue;
- Park, Sung Hyeon;
- Jeong, Sang Young;
- Choi, Yoon Young;
- Ahn, Jong-Hyun;
- ... Woo, Han Young;
- 외 1명
WEB OF SCIENCE
20SCOPUS
21초록
Synaptic devices have gained prominence as viable alternatives to conventional complementary metal-oxide-semiconductor-based (CMOS) electronics in the information processing field owing to their inherent advantages in analog and parallel operations. The potential of synaptic devices has not yet been fully utilized for logic operations because only the conventional binary logic structure has been applied to analog synaptic devices, leading to the loss of advantages unique to analog signals. To resolve this issue, an innovative concept is proposed: an analog logic gate that can perform parallel operations at the device level and is coupled with logic reconfigurations, enabling comprehensive analog computation. This logic gate comprises two synaptic devices with different retention characteristics, adjusted by the side-chain engineering of an organic polymer. The long-term and short-term synaptic devices serve as reconfigurable synapse for logic mode selection and parallel processable logic synapse, respectively. In this study, the reconfigurable and parallel processable synaptic logic circuit is effectively implemented in a personalized disease risk diagnostic system. This innovative approach not only allows for the simultaneous computation of analog-formed diagnostic data, but also enhances both computing efficiency and system complexity in general synaptic systems. Reconfigurable multi-input synaptic logic gate (RMSL) is designed by incorporating two retention-engineered synaptic transistors. The parallel processing capabilities and reconfigurability of RMSL contribute to enhanced computational efficiency and system complexity, particularly in complex analog logic tasks such as disease diagnosis. image
키워드
- 제목
- Reconfigurable Logic Gates Capable of Device-Level Parallel Processing Through Multi-Input Synaptic Device
- 저자
- Roe, Dong Gue; Park, Sung Hyeon; Jeong, Sang Young; Choi, Yoon Young; Ahn, Jong-Hyun; Woo, Han Young; Cho, Jeong Ho
- 발행일
- 2024-04-19
- 유형
- Article; Early Access
- 권
- 34
- 호
- 32
- 언어
- ENG
- 출판사
- WILEY-V C H VERLAG GMBH
- 발행국가
- 독일
- ISSN
- E 1616-3028
P 1616-301X