A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC

A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC
제목
A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC
제목 (타언어)
A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC
저자
Lee, Hyung-Min
발행일
2018-02-13
학회명
IEEE Int. Solid-State Circuits Conf. (ISSCC)
개최지
San Francisco, CA, USA
개최국가
미국
학회 개최일
2018-02-11 ~ 2018-02-15