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초록
In this paper, motion estimation preprocessing algorithm is mapped onto a new dynamically parallel computing architecture, namely, the parallel computing architecture, which consists of multiple parallel units It eventually reduces the computation required for motion estimation in advance video coding A directed acyclic graph is constructed to represent the video coding algorithms comprising motion estimation This speeds up the video processing with minimum sacrifice
키워드
Motion estimation; Video coding; Parallel processing; Parallel architecture; FPGA; SPACE EXPLORATION
- 제목
- Dynamic Parallel Computing Architecture for Video Processing
- 저자
- Bharanitharan, K.; Paul, Anand; Jiang, Yung-Chuan; Wang, Jhing-Fa
- 발행일
- 2010-11
- 유형
- Article
- 권
- 11
- 호
- 6
- 페이지
- 867 ~ 873