A 15-40 GHz CMOS True-Time Delay Circuit for UWB Multi-Antenna Systems

초록

A CMOS true-time delay (TTD) circuit operating from 15 to 40 GHz is presented for integrated UWB multi-antenna systems. The TTD circuit employs a distributed active switching structure in which eight cascode switches are distributed along transmission lines, leading to 3-bit variations of the group delay. The size of the switches and the characteristic impedance of the transmission lines are carefully scaled so as to minimize loss variation among the different delay states, while maintaining flat delay performance over a wide bandwidth. The circuit is implemented in a bulk 0.13-mu m CMOS technology and exhibits a total variable group delay of 40 ps with an average resolution of 5 ps from 15 to 40 GHz. The insertion loss was 14 dB with a maximum RMS variation of 1.6 dB, while the input and output return loss was better than 10 dB over the operating bandwidth.

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