An Analog Neuromorphic On-Chip Training System With IGZO TFT-Based 6T1C Synaptic Memory

  • Kang, Minil; 
  • Um, Minseong; 
  • Won, Jongun; 
  • Kang, Jaehyeon; 
  • Hong, Sangjun; 
  • ... Lee, Hyung-Min; 
  • 외 3명
Citations

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7
Citations

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4

초록

This article proposes an analog synapse-based neuromorphic on-chip training system that uses emerging indium gallium zinc oxide (IGZO) thin film transistor (TFT) synapse cells to store multi-bit states for deep neural networks (DNNs). IGZO TFT demonstrates extremely low leakage currents, preserving the charge stored in capacitors during prolonged training periods. The 6 transistor 1 capacitor (6T1C) structure, characterized by its symmetrical design and current sources configuration, achieves an average of 367 distinct states with high linearity, reflected by an R-2 value of 0.99 through a neuron circuit. By adjusting currents and capacitor sizes, the system effectively integrates currents from both individual synapses and the overall array. Additionally, the neuron circuit, implemented separately from the IGZO TFT synapse array, demonstrates an 8.95 effective number of bits (ENOB) in overall performance measurements. The neuron circuit and IGZO TFT array have areas of 7.2 and 10.2 mm(2), respectively. Using the proposed neuromorphic system with the 6T1C memory structure, we successfully conducted the first analog on-chip training with the last layer, achieving an accuracy of 97.1% on the MNIST dataset.

키워드

Synapses; Training; Thin film transistors; Analog memory; Neuromorphics; Capacitors; Transistors; Logic gates; Neurons; Leakage currents; analog neuromorphic; indium gallium zinc oxide (IGZO) thin film transistor (TFT); matrix processing; new memory; training; MACRO
제목
An Analog Neuromorphic On-Chip Training System With IGZO TFT-Based 6T1C Synaptic Memory
저자
Kang, Minil; Um, Minseong; Won, Jongun; Kang, Jaehyeon; Hong, Sangjun; Han, Narae; Kim, Sangwook; Kim, Sangbum; Lee, Hyung-Min
DOI
10.1109/JSSC.2025.3556123
발행일
2025-04-09
유형
Article; Early Access
저널명
IEEE Journal of Solid-State Circuits
권
60
호
11
페이지
4128 ~ 4139