D-Band Heterodyne Integrated Imager in a 65-nm CMOS Technology

  • Yoon, Daekeun; 
  • Kim, Namhyung; 
  • Song, Kiryong; 
  • Kim, Jungsoo; 
  • Oh, Seung Jae; 
  • ... Rieh, Jae-Sung
Citations

WEB OF SCIENCE

16
Citations

SCOPUS

16

초록

A D-band heterodyne integrated imager, consisting of a mixer, an oscillator, an IF amplifier, and an IF detector, has been developed in a 65-nm CMOS technology. A measured responsivity of 720 kV/W and noise equivalent power (NEP) of 0.9 pW/Hz(1/2) were obtained at 125 GHz. A total dc power of 74 mW was dissipated. The chip size is 1200 x 800 mu m(2) including contact pads and an input balun. A D-band image was acquired with the imager serving as a detector. A significant resolution enhancement was demonstrated with a near-field imaging achieved by a metal plate with a pinhole in the imaging setup.

키워드

CMOS; CMOS integrated circuit; imaging; receivers; ARRAY
제목
D-Band Heterodyne Integrated Imager in a 65-nm CMOS Technology
저자
Yoon, Daekeun; Kim, Namhyung; Song, Kiryong; Kim, Jungsoo; Oh, Seung Jae; Rieh, Jae-Sung
DOI
10.1109/LMWC.2015.2390496
발행일
2015-03
유형
Article
저널명
IEEE Microwave and Wireless Components Letters
권
25
호
3
페이지
196 ~ 198