12Gb/s Over Four Balanced Lines Utilizing NRZ Braid Clock Signaling with 100% Data Payload and Spread Transition Scheme for 8K UHD Intra-panel Interfaces

12Gb/s Over Four Balanced Lines Utilizing NRZ Braid Clock Signaling with 100% Data Payload and Spread Transition Scheme for 8K UHD Intra-panel Interfaces
제목
12Gb/s Over Four Balanced Lines Utilizing NRZ Braid Clock Signaling with 100% Data Payload and Spread Transition Scheme for 8K UHD Intra-panel Interfaces
제목 (타언어)
12Gb/s Over Four Balanced Lines Utilizing NRZ Braid Clock Signaling with 100% Data Payload and Spread Transition Scheme for 8K UHD Intra-panel Interfaces
저자
KIM, Chulwoo
발행일
2017-02-07
학회명
IEEE International Solid-State Circuits Conference
개최국가
미국
학회 개최일
2017-02-05 ~ 2017-02-09